As manufacturers and designers of integrated circuits continue to relentlessly decrease the size of integrated-circuit features, such as transistors and signal lines, and to correspondingly increase the density at which features can be fabricated within integrated circuits, they are beginning to approach fundamental physical limits to further decreases in feature sizes for integrated circuits fabricated by conventional photolithography techniques. Research efforts have, during the past decade, turned to new, non-photolithography-based techniques for fabricating nanoscale electronics that allow for fabrication of significantly smaller features than the smallest features currently fabricated by photolithographic techniques. In one approach to designing and fabricating nanoscale electronics, nanowire crossbars comprising multiple layers of parallel nanowires are fabricated by self-assembly or self-orientation with molecular-scale widths on surfaces. The grid-like nanowire crossbars provide a two-dimensional array of nanowire junctions at the closest points of contact between nanowires of a first layer, oriented in a first direction, and nanowires of a second layer, oriented in a second direction approximately perpendicular to the first direction. The nanowire junctions, comprising a small number of molecules of a nanonwire-junction substance, can be fabricated to have properties of resistors, diodes, transistors, and other familiar components of conventional electronic circuits.
Many different prototype nanoscale electronic circuits have been produced in research and development environments, and continued research efforts are producing palettes of nanoscale-electronic components and features of increasing sizes, a rich variety of useful nanoscale-electronic component organizations, and a variety of fabrication methods for producing nanoscale electronic components and devices. However, practical, commercial electronic devices need to include large scale, microscale, and submicroscale components and circuits that interface to nanoscale electronic devices and circuitry. In many cases, devising reliable and cost-effective interfaces between microscale and submicroscale electronics and nanoscale electronics has proven to be more difficult than the design and fabrication of nanoscale electronic devices.
One approach to interfacing microscale and submicroscale electronics to nanoscale electronics involves the use of microscale-to-nanoscale demultiplexers. FIG. 1 illustrates an exemplary demultiplexer/nanowire-crossbar configuration that allows individual nanowire junctions within a nanowire crossbar to be accessed by address signals input to microscale signal lines. As shown in FIG. 1, a first demultiplexer 102 interconnects a small number of microscale address signal lines 104 to a much larger number of parallel nanowires 106 within a nanowire crossbar 108. A second demultiplexer 110 interconnects a second set of microscale address signal lines 112 to a second set of parallel nanowires 114 within the nanowire crossbar 108. Various nanowire junctions may be configured to have particular electronic properties, including properties characteristic of transistors, resistors, diodes, and other such electronic components, represented in FIG. 1 with filled circles, such as filled circle 116, overlying particular nanowire junctions. In the exemplary microscale/nanoscale interface shown in FIG. 1, the four address lines (e.g. address lines 104) input to the demultiplexer can carry any of 24 or 16 different digital patterns, or addresses, of high and low voltage or current binary signals on each address line. The demultiplexer can translate each different perceived address into a pattern of high and low signals output to the nanowires to which it is connected. Typically, a demultiplexer outputs a high, or Boolean “1,” signal to a single nanowire corresponding to a four-bit nanowire address received through the microscale address signal lines, and low, or Boolean “0” signals to the remaining, non-addressed nanowires. By arranging the demultiplexers, as shown in FIG. 1, each nanowire junction within the nanowire crossbar can be individually addressed by a pair of addresses, one address received on the first set of address signal lines 104 and a second address received on the second set of address signal lines 112. The nanowire crossbar can be configured arbitrarily to implement any of a large number of different possible circuits which output result signals to selected nanowires. The nanowire crossbar in FIG. 1 is exemplary of the overall organization, and is not intended to represent any particular circuit or device.
Working prototypes of demultiplexer-based microscale/nanoscale interfaces have been developed, and the demultiplexer-based microscale/nanoscale interface has been shown to be a feasible and effective nanoscale/microscale interface technique. However, in general, addressing of a single nanowire by each multiplexer at each instant in time represents a significant bandwidth constriction since, as shown in the example shown in FIG. 1, only one junction may be addressed at a time. Demultiplexer-based nanoscale/microscale interfaces may therefore represent significant bandwidth bottlenecks within mixed-scale microelectronic devices. The demultiplexer-based approach may additionally add design and fabrication overheads, cost, and reliability problems to mixed-scale electronic devices with densely interconnected microscale and nanoscale circuits and functional modules. Therefore, researchers and developers of mixed-scale electronic devices continue to seek more reliable, more easily fabricated, and less bandwidth-constricting nanoscale/microscale interfaces for use in mixed-scale electronic devices.